Gary requested a logic snapshot of the 6502C in action, so I got a second 40 pin IC clip wired up to a second set of leads that could easily plug into the LogicPort. Capturing what the 6502C did at reset was very helpful in bringing us to the realization that with the current logic designed to anticipate the ANTIC chip taking the bus, the 6809E was still coming in a cycle too early.
Gary's rework of the design focused on changing how we asserted the TSC (tri-state control) line of the 6809E. Its an input to the 6809E that basically tells it to back off and let someone else carry the bus for the next cycle or so. Our current IC logic used a 74LS04 and a 74LS00 (NAND and inverter chips), but we needed something a bit more elaborate. Gary added a 74LS74, or what is known as a J/K flip-flop to the design to halt the 6809E for another clock cycle and stretched the E and Q clock lines for that cycle as well. The end result was that the 6809E should stay away from the bus long enough for the ANTIC to do its business.
I didn't relish the idea of tearing into the prototype to add another chip. Already, the board was looking pretty ragged. But I knew it was the only way to prove out the design, and so I spent several evenings carefully planning the addition of the 74LS74. Luckily, I was able to scrounge a few from some old boards in a parts bin that I keep around the shop. A few days later, I had the prototype board wired up as per Gary's modifications.
Feeling pretty skeptical that it would work, I prepped the ROM emulator, plugged the prototype in and fired up the Atari XEGS for what seemed like the 100th time. And much to my dismay, I got nothing on the screen.